When a gate electrode of a select transistor or a peripheral transistor in an NAND memory is formed of polysilicon layers and metal layers and a contact plug is formed on the gate electrode, there is a problem that contact resistance between the bottom end of the contact plug and the bottom end of the gate electrode becomes large. This is because interface resistance between the polysilicon layers and between a polysilicon layer and a metal layer are large and the interface resistance affects the contact resistance. Furthermore, when the interface area becomes smaller as the NAND memory is made finer, the interface resistance further becomes larger.